Saturday, 14 December 2019

Digital Hardware Design

  • TELECOMS AND DATA COMMUNICATIONS – UMTS 3.0G Multi-megabit transmitter/receiver error correction, Power analyser/optimiser for 3.0G transmitter networks, UART for the service-layer interface, test-bench development for UMTS 3.0G (including models for 68k processor, flash PROM, DRAM, SRAM, test-benches for verification and validation, Mealy and Moore state-machines, high-speed AD/DA controllers, RAM and FLASH memory controllers, HDL based algorithm development to provide performance enhancing co-processor function.


  • Aerospace – Designing to meet hardware security requirements of AIC class aircraft (i.e. triple-redundant systems), recommending CPLDs, responsible for producing complete test-bench for the multiprocessor PCI-busGraphics Card VHDL-93 (high performance flat-panel cockpit displays), translating existing AHDL code to VHDL-87 standard, recommending suitable test procedures for verification (verify compliance with customer requirement specification), unifying customer’s existing VHDL code with , STA (static timing analysis), produced autonomous file-based auto-testing test-benches in VHDL-93 (for full hardware accelerated anti-aliasing Graphics Cards), developed test-benches for error correcting memory controllers. Testability analysis: verifying 100% line coverage, >95% condition coverage,


  • Hardware Designs – Excellent digital design skills, including micro-processor design, programmable logic devices such as GAL, PAL and PEELS. CPLD, FPGA, digital ASICs, PCI-bus interface, CAN bus 2.0B interfaces, MVB-bus, high-speed ADC – DAC conversion interface and data conditioning, IIR and FIR digital filter design, x-buffered UARTs, RS-232, RS-485, switched data packet implementation, D-RAM/S-RAM controller for 6800 to 68k (40x speed up, Exchange card for the X2000 train),. Highly successful HDL implementation for Intelligent IGBT driver for megawatt traction application (Adtranz trains), High-performance GPU (Graphics Processing Unit), High-Speed Asynchronous MUX/DEMUX, Dual-processor MUXing for flat-panel graphical displays, FIFOs and LIFOs, digital oil-quality analyser for high-voltage transformer (serial PC interface, Pascal graphical interface PC software coding, VHDL based hardware design), Flatbed Scanner Controller, HDL stepper motor controller with parallel PC link, test-bench for IGBT drivers (burn-in), Mealy and Moore state-machines,


  • Computer Aided Design – Detailed working knowledge of CAD applications including: OrCAD schematic capture, and PSPICE, analogue/digital electronic circuit simulators. ModelSim SE, Xilinx ISE, Altera Quartus II, Synplify Pro, DOORS, Clearcase, Mentor Graphics, QVCS Tool for version control, Cypress CPLD Tools, Synopsys Tools.